IEEE Standard 1149.1 (commonly known as “JTAG”) describes a protocol and architecture for conducting a boundary-scan or otherwise digitally testing an integrated circuit. However, with the advent of complex mixed signal applications, namely, printed circuit boards and integrated circuits using both analog and digital signaling, there is a need for a test interface for testing analog signals.
The Institute of Electrical and Electronics Engineers (“IEEE”) has advocated a standard for analog boundary-scanning, namely, IEEE 1149.4. This newly proposed standard builds on the hardware and software covered by the digital boundary-scanning standard, namely, IEEE 1149.1, adding devices to incorporate both analog and digital boundary-scanning. However, limitations associated with this proposed analog boundary-scan standard have kept it from wide market place acceptance. For example, there is an additional cost to add an analog test bus both on an integrated circuit and on a circuit board. Also, testing as proposed may be limited to lower frequencies, and thus not accommodate higher frequency analog signals. Additionally, an analog test bus may be susceptible to digital noise, whether originating from an integrated circuit or a circuit board.
Accordingly, it would be desirable and useful to provide analog boundary-scanning that overcomes one or more of the above-mentioned limitations.